This invention generally relates to an offset reducer. This invention specifically relates to a device for removing dc or offset components from a signal in a digital circuit.
Digital filters process digital signals and execute given calculations on the digital signals. In some of digital filters, the result of calculation is rounded down to a required number of bits by omitting bits lower than the required bits. Rounding down the calculation result causes a dc or offset component of a signal outputted from the digital filter. Generally, it is desirable to remove such an offset component from a signal.
Japanese published unexamined patent application 64-4111 discloses a digital filter circuit which serves as an offset reducer. Specifically, the prior art circuit of Japanese application 64-4111 includes a digital filter having a transfer function H(z) designed as follows. EQU H(z)=1-z.sup.-1 ( 1)
This prior art digital filter has amplitude-frequency response characteristics expressed as follows. EQU A(z)=2.multidot..vertline. sin (.theta./2).vertline. (2)
where A(z) denotes an amplitide, and .theta. denotes an angular frequency. As understood from the equation (2), the prior art digital filter is a low cut filter capable of removing dc components from an input signal.
In processing digital audio signals, low-frequency signal components are generally important for high fidelity. The prior art digital filter of Japanese application JP1-4111 tends to significantly reduce the levels of important low-frequency signal components.